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SR Latch (NAND)

Two cross-coupled NAND gates form a set/reset latch — the simplest one-bit memory element.

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{
  "nodes": [
    { "id":"s",     "type":"rounded",    "label":"S",    "x":40,  "y":80,  "fill":"#dbeafe" },
    { "id":"r",     "type":"rounded",    "label":"R",    "x":40,  "y":300, "fill":"#dbeafe" },
    { "id":"nand1", "type":"logic-nand", "label":"NAND", "x":320, "y":90,  "fill":"#e0e7ff" },
    { "id":"nand2", "type":"logic-nand", "label":"NAND", "x":320, "y":290, "fill":"#e0e7ff" },
    { "id":"q",     "type":"rounded",    "label":"Q",    "x":600, "y":90,  "fill":"#dcfce7" },
    { "id":"qn",    "type":"rounded",    "label":"Q'",   "x":600, "y":290, "fill":"#fef3c7" }
  ],
  "edges": [
    { "id":"e1","source":"s","target":"nand1" },
    { "id":"e2","source":"r","target":"nand2" },
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    { "id":"e4","source":"nand2","target":"qn" },
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    { "id":"e6","source":"nand2","target":"nand1" }
  ]
}