Skip to content
Digital logic (gates / K-map / truth table) templates

Logic — SR latch (NAND)

Cross-coupled NAND SR latch.

Template previewDigital logic (gates / K-map / truth table)
SR latch (NAND)SRG1G2QQbarEvaluated: 2 inputs, 2 outputs, 4 rows. 2 things are probably not what was meant.`G1` is a NAND with one wire into it, from `S`. A one-input NAND is an inverter, and the figure still…`G2` is a NAND with one wire into it, from `R`. A one-input NAND is an inverter, and the figure still…Q = ¬SQbar = ¬R

Make it your own.

title "SR latch (NAND)"
type gates
input S at (0,0)
input R at (0,3)
gate NAND G1 at (3,0.7)
gate NAND G2 at (3,2.3)
output Q at (6,0.7)
output Qbar at (6,2.3)
wire S G1
wire R G2
wire G1 Q
wire G2 Qbar