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Digital logic (gates / K-map / truth table) templates

Physics — Logic: JK flip-flop

The gate-level structure of a JK flip-flop.

Digital logic (gates / K-map / truth table)Chemistry & PhysicsDigital logic (gates / K-map / truth table) syntax docs
Template previewDigital logic (gates / K-map / truth table)
JK flip-flop (gate level)JCLKKG1G2G3G4QQbarEvaluated: 3 inputs, 2 outputs, 8 rows. 2 things are probably not what was meant.`G3` is a NOR with one wire into it, from `G1`. A one-input NOR is an inverter, and the figure still draws the two-i…`G4` is a NOR with one wire into it, from `G2`. A one-input NOR is an inverter, and the figure still draws the two-i…Q = ¬(J · CLK)Qbar = ¬(CLK · K)

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title "JK flip-flop (gate level)"
type gates
input J at (0,0)
input CLK at (0,2)
input K at (0,4)
gate AND G1 at (3,0.5)
gate AND G2 at (3,3.5)
gate NOR G3 at (6,1)
gate NOR G4 at (6,3)
output Q at (9,1)
output Qbar at (9,3)
wire J G1
wire CLK G1
wire CLK G2
wire K G2
wire G1 G3
wire G2 G4
wire G3 Q
wire G4 Qbar