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Packet & bit fields templates

Packet — Deliberately Wrong: Two Fields Claiming One Bit

A teaching artefact with two overlaps in it: `Loopback` and `Mode` both claim bit 5, and `Mode` and `Speed` both claim bits 6 to 8. The drawing of that is indistinguishable from a correct one, which is why the engine computes each overlap, hatches it and names both under the figure. Open this one to see what an overlap finding reads like before you meet one in your own register map.

Template previewPacket & bit fields
Config register — with an overlap (deliberate)16-bit words · 1 word · 16 bits laid out · 9 fields · ruler shows ABSOLUTE bit indicesLSB-first: bit 0 is the least significant bit of each 16-bit word, drawn rightmost; indices decrease to the right.In both orders the most significant bit of a word is the leftmost column — only the numbering flips.2 layout findings across 9 fields — see the notes.MSBLSBword 0bits 0–15+0B1514131211109876543210Enab…bit 0…Resetbit 1…Channelbits 2–4 · 3bLoop…bit 5…Modebits 5–8 · 4bSpeedbits 6–9 · 4bPrescalerbits 10–13 · 4bRese…bit 1…Lockbit 1…overl…overlapLoopback and Mode both claim bit 5 — they overlap.Mode and Speed both claim bits 6–8 — they overlap.

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title "Config register — with an overlap (deliberate)"
width 16
bitorder lsb
words 1

0:     Enable
1:     Reset
2-4:   Channel
5:     Loopback
5-8:   Mode
6-9:   Speed
10-13: Prescaler
14:    Reserved = 0
15:    Lock