10 templates
Packet & bit fields templates
Protocol headers and register bit-field layouts at 8, 16, 32 or 64 bits a word, in either bit order and saying which is in force. Checks the layout rather than just drawing it: overlapping fields, unclaimed bit runs and fields that overflow the declared extent are computed and named.
Packet — IPv4 Header (RFC 791)
The header every network diagram starts from, drawn at 32 bits a word in RFC bit order with the absolute bit indices on the ruler. Complete: every bit of the five fixed words is claimed, so the engine reports no gaps and the reader can trust that the layout is the whole layout.
ArchitecturePacket — TCP Header (RFC 9293)
Twenty bytes of TCP with each control flag on its own bit, which is the part a prose description always compresses into 'flags' and the part anyone reading a capture actually needs. Written with run-length fields after the first word to show the two notations mixing.
ArchitecturePacket — Ethernet II Frame Header
Two MAC addresses and an EtherType, which is the smallest useful demonstration of a field that wraps across word boundaries: a 48-bit address on a 32-bit word does not fit in one row and is drawn split rather than flagged, because wrapping is the layout working and not a defect. It also declares no extent, so the engine says the trailing sixteen bits of the last word are outside the layout rather than unallocated inside it — two states that must not look the same.
ArchitecturePacket — UDP Header, Eight Bytes
The whole of UDP in two words, and the clearest example of the run-length form: four consecutive sixteen-bit fields written as `+16:` rather than as absolute ranges, with the cursor doing the arithmetic so a later insertion does not require renumbering everything after it.
ArchitecturePacket — 32-bit Control Register (datasheet order)
A peripheral control register in LSB-first order, which is how every datasheet in the world numbers bits and the opposite of the RFC convention the protocol templates use. Reserved bits are declared with their required value rather than left out, so the layout has no unclaimed holes and firmware written from it will not leave a reserved bit floating.
ArchitecturePacket — 16-bit Status Register with Read-Only Flags
A narrower word width, which is the setting people forget exists and then draw a 16-bit register on a 32-bit grid. Sixteen bits a word, LSB order, every bit accounted for — including the two reserved runs, because a reserved bit that is simply absent from the drawing is indistinguishable from one nobody thought about.
ArchitecturePacket — DNS Message Header (RFC 1035)
Twelve bytes with a four-bit opcode and a four-bit response code packed either side of five single-bit flags, which is the layout most often drawn wrong because the flag byte is easier to describe in prose than to lay out. Complete over three 32-bit words.
ArchitecturePacket — IPv6 Fixed Header, Forty Bytes
Ten words with two 128-bit addresses, which is the case that makes the wrapping question unavoidable: each address is four whole words and is drawn as such. Useful as a starting point for extension-header diagrams, where the fixed part above stays and the rest changes.
ArchitecturePacket — Deliberately Wrong: Two Fields Claiming One Bit
A teaching artefact with two overlaps in it: `Loopback` and `Mode` both claim bit 5, and `Mode` and `Speed` both claim bits 6 to 8. The drawing of that is indistinguishable from a correct one, which is why the engine computes each overlap, hatches it and names both under the figure. Open this one to see what an overlap finding reads like before you meet one in your own register map.
ArchitecturePacket — Deliberately Wrong: Bits Nobody Claimed
The second teaching artefact. Bits 12 to 19 of a declared two-word layout belong to no field, and the difference between 'reserved' and 'nobody thought about it' is the whole of what a register map is for. The engine marks the run and says how wide it is, rather than drawing a tidy diagram over a hole.
Architecture