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Digital logic (gates / K-map / truth table) templates

Physics — Logic: D latch

A gated D latch from four NAND gates.

Digital logic (gates / K-map / truth table)Chemistry & PhysicsDigital logic (gates / K-map / truth table) syntax docs
Template previewDigital logic (gates / K-map / truth table)
D latchDEG1G2G3G4G5QQbarEvaluated: 2 inputs, 2 outputs, 4 rows. 2 things are probably not what was meant.`G4` is a NAND with one wire into it, from `G2`. A one-input NAND is an inverter, and the figure still draws the two-input sym…`G5` is a NAND with one wire into it, from `G3`. A one-input NAND is an inverter, and the figure still draws the two-input sym…Q = ¬¬(D · E)Qbar = ¬¬(¬D · E)

Make it your own.

title "D latch"
type gates
input D at (0,0)
input E at (0,3)
gate NOT G1 at (2,1.5)
gate NAND G2 at (4,0)
gate NAND G3 at (4,3)
gate NAND G4 at (7,0.5)
gate NAND G5 at (7,2.5)
output Q at (10,0.5)
output Qbar at (10,2.5)
wire D G2
wire D G1
wire G1 G3
wire E G2
wire E G3
wire G2 G4
wire G3 G5
wire G4 Q
wire G5 Qbar