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Digital logic (gates / K-map / truth table) templates

Physics — Logic: master-slave flip-flop

Two latches in series give edge-triggered behaviour.

Template previewDigital logic (gates / K-map / truth table)
Master-slave D flip-flopDCLKM1M2C1S1S2QQbarEvaluated: 2 inputs, 2 outputs, 4 rows. 2 things are probably not what was meant.`Q` and `Qbar` compute the same function — they agree in all 4 rows. Two outputs named as complements that are the s…`D` is wired into the circuit and no output depends on it: flipping it changes nothing in any of the 4 rows. The wir…Q = ¬(¬(D · CLK) · ¬CLK)Qbar = ¬(¬(CLK · D) · ¬CLK)

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title "Master-slave D flip-flop"
type gates
input D at (0,0)
input CLK at (0,3)
gate NAND M1 at (3,0)
gate NAND M2 at (3,2)
gate NOT C1 at (2,3)
gate NAND S1 at (6,0)
gate NAND S2 at (6,2)
output Q at (9,0)
output Qbar at (9,2)
wire D M1
wire CLK M1
wire CLK M2
wire D M2
wire CLK C1
wire M1 S1
wire M2 S2
wire C1 S1
wire C1 S2
wire S1 Q
wire S2 Qbar