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Digital logic (gates / K-map / truth table) templates

Physics — Logic: XOR from NAND gates

The universal NAND gate builds an exclusive-OR.

Template previewDigital logic (gates / K-map / truth table)
XOR from four NAND gatesABG1G2G3G4YEvaluated: 2 inputs, 1 output, 4 rows — Y = ¬(¬(A · ¬(A · B)) · ¬(¬(A · B) · B)).Y = ¬(¬(A · ¬(A · B)) · ¬(¬(A · B) · B))

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title "XOR from four NAND gates"
type gates
input A at (0,0)
input B at (0,3)
gate NAND G1 at (3,1.5)
gate NAND G2 at (6,0)
gate NAND G3 at (6,3)
gate NAND G4 at (9,1.5)
output Y at (12,1.5)
wire A G1
wire B G1
wire A G2
wire G1 G2
wire G1 G3
wire B G3
wire G2 G4
wire G3 G4
wire G4 Y